Debian Science Project
Summary
Electronics
Debian Science Electronics packages

This metapackage will install Debian Science packages related to Electronics. You might also be interested in the field::electronics debtag and, depending on your focus, in the education-electronics metapackage.

Description

For a better overview of the project's availability as a Debian package, each head row has a color code according to this scheme:

If you discover a project which looks like a good candidate for Debian Science to you, or if you have prepared an unofficial Debian package, please do not hesitate to send a description of that project to the Debian Science mailing list

Links to other tasks

Debian Science Electronics packages

Official Debian packages with high relevance

Arachne-pnr
Place and route tool for iCE40 family FPGAs
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Arachne-pnr implements the place and route step of the hardware compilation process for FPGAs. It accepts as input a technology-mapped netlist in BLIF format, as output by the Yosys synthesis suite for example. It currently targets the Lattice Semiconductor iCE40 family of FPGAs. Its output is a textual bitstream representation for assembly by the IceStorm icepack command. The output of icepack is a binary bitstream which can be uploaded to a hardware device.

Together, Yosys, arachne-pnr and IceStorm provide an fully open-source Verilog-to-bistream tool chain for iCE40 1K and 8K FPGA development.

Arduino
AVR development board IDE and built-in libraries
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Arduino is an open-source electronics prototyping platform based on flexible, easy-to-use hardware and software. It's intended for artists, designers, hobbyists, and anyone interested in creating interactive objects or environments.

This package will install the integrated development environment that allows for program writing, code verfication, compiling, and uploading to the Arduino development board. Libraries and example code will also be installed.

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Arduino-core
Code, examples, and libraries for the Arduino platform
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Arduino is an open hardware microcontroller platform. This package contains the minimal set of tools to allow one to program an Arduino. It also contains examples and libraries. For a CLI, see the 'arduino-mk' package.

This package does not include the Java based Integrated Development Environment, which can be found in the 'arduino' package.

Avrdude
software for programming Atmel AVR microcontrollers
Maintainer: Milan Kupcevic
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AVRDUDE is an open source utility to download/upload/manipulate the ROM and EEPROM contents of AVR microcontrollers using the in-system programming technique (ISP).

Berkeley-abc
ABC - A System for Sequential Synthesis and Verification
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This is a growing software system for synthesis and verification of binary sequential logic circuits appearing in synchronous hardware designs. ABC combines scalable logic optimization based on And-Inverter Graphs (AIGs), optimal-delay DAG-based technology mapping for look-up tables and standard cells, and innovative algorithms for sequential synthesis and verification.

ABC provides an experimental implementation of these algorithms and a programming environment for building similar applications. Future development will focus on improving the algorithms and making most of the packages stand-alone. This will allow the user to customize ABC for their needs as if it were a tool-box rather than a complete tool.

Covered
Verilog code coverage analysis tool
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Covered is a Verilog code coverage utility that reads in a Verilog design and a generated VCD/LXT dumpfile from that design and generates a coverage file that can be merged with other coverage files or used to create a coverage report. Covered also contains the GUI coverage report utility that reads in a coverage file to allow interactive coverage discovery. Areas of coverage measured by Covered are: line, toggle, memory, combinational logic, FSM state/state-transition and assertion coverage.

Dfcgen-gtk
Digital Filter Coefficients Generator (DFCGen) GTK+
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DFCGen, the Digital Filter Coefficients Generator, assists the engineer in the design of digital filters. It supports the engineer in analysis and synthesis of linear time-invariant time-discrete (LTI) systems from the theoretical point of view. It performs generation of system transfer function coefficients in the Z-domain, based on the type and specific parameters of a chosen system.

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Drawtiming
tool for documenting hardware designs through timing diagrams
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Drawtiming is a command-line tool for documenting hardware designs through timing diagrams. In inputs textual signal descriptions and outputs image timing diagrams in many possible formats.

Electric
electrical CAD system
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Electric is a sophisticated electrical CAD system that can handle many forms of circuit design, including custom IC layout (ASICs), schematic drawing, hardware description language specifications, and electro-mechanical hybrid layout.

Fpga-icestorm
Tools to handle the bitstream format of Lattice iCE40 FPGAs
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Project IceStorm aims at documenting the bitstream format of Lattice iCE40 FPGAs and providing simple tools for analyzing and creating bitstream files. At the moment the focus of the project is on the HX1K-TQ144 and HX8K-CT256 devices, but most of the information is device-independent.

This package contains multiple tools needed to handle the bitstream.

Freehdl
VHDL simulator for Linux
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This is a free VHDL simulator with these features:

  • Has a graphical waveform viewer.
  • Has a source level debugger.
  • Is VHDL-93 compliant.
Fritzing
Easy-to-use electronic design software
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Fritzing is an open source project designed to help one transition from a prototype to a finished project. Aimed at users who want to produce or document circuits and experiments, one starts by building a physical prototype, then recreating it with Fritzing’s graphical editor. From there one can generate a schematic, PCB artwork, and PCB production files.

Gcc-avr
GNU C compiler (cross compiler for avr)
Maintainer: Hakan Ardo
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This is the GNU C compiler, a fairly portable optimizing compiler which supports multiple languages. This package includes support for C.

Geda
GPL EDA -- Electronics design software (metapackage)
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The gEDA project has produced and continues working on a full GPL'd suite and toolkit of Electronic Design Automation tools. These tools are used for electrical circuit design, schematic capture, simulation, prototyping, and production. Currently, the gEDA project offers a mature suite of free software applications for electronics design, including schematic capture, attribute management, bill of materials (BOM) generation, netlisting into over 20 netlist formats, analog and digital simulation, and printed circuit board (PCB) layout.

This is a metapackage which depends on the components required for a typical gEDA installation.

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Geda-xgsch2pcb
GPL EDA -- Electronics design software -- gschem -> PCB workflow GUI
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xgsch2pcb provides an intuitive, user-friendly graphical interface to the gsch2pcb command-line tool, part of the gEDA suite, which is used to generate and update a PCB layout. It works with schematics created by gschem, part of the gEDA suite, and layouts created by pcb, a PCB layout system commonly used with gEDA.

Gerbv
Gerber file viewer for PCB design
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gerbv is a utility for viewing Gerber RS-274X files, Excellon drill files, and CSV pick-and-place files. Gerber files are used for communicating printed circuit board (PCB) designs to PCB manufacturers.

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Ghdl
VHDL compiler/simulator using GCC technology
Maintainer: Wesley J. Landaker
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(Description from the GHDL home page http://ghdl.free.fr):

GHDL is a VHDL simulator, using the GCC technology.

VHDL is a language standardized by the IEEE, intended for developing electronic systems.

GHDL implements the VHDL language according to the IEEE 1076-1987 or the IEEE 1076-1993 standard. GHDL compiles VHDL files and creates a binary which simulates (or executes) your design.

GHDL does not do synthesis: it cannot translate your design into a netlist.

Gnucap
GNU Circuit Analysis package
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GNUCAP is a general purpose circuit simulator. It performs nonlinear dc and transient analyses, Fourier analysis, and ac analysis linearized at an operating point. It is fully interactive and command driven. It can also be run in batch mode or as a server. The output is produced as it simulates. Spice compatible models for the MOSFET (level 1,2,3) and diode are included in this release.

Gnusim8085
Graphical Intel 8085 simulator, assembler and debugger
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GNUSim8085 is a graphical simulator, assembler and debugger for the Intel 8085 microprocessor.

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Gplcver
Verilog simulator
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Cver is a full 1995 IEEE P1364 standard Verilog simulator. It also implements some of the 2001 P1364 standard features. All three PLI interfaces (tf_, acc_, and vpi_) are implemented as defined in the IEEE 2001 P1364 LRM.

Homepage: http://www.pragmatic-c.com/gpl-cver

Gputils
GNU PIC utilities
Maintainer: Taisuke Yamada ()
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Those utilities for the Microchip PIC microcontrollers family contain an assembler (compatible with MPASM), a disassembler, and other tools.

Graywolf
Placement for digital VLSI design
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This is a utility used to perform placement of digital VLSI designs. It is based on some code from the early 90s and it is one of the building blocks of the open source qflow digital design flow.

Gspiceui
Graphical user interface for gnucap and ngspice
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Gspiceui is a graphichal user interface for the two freely available electronic circuit engines: GNU-Cap and Ng-Spice. Current features are:

  • Import gschem schematic files using gentlist.
  • Load and parse circuit description (net list) files.
  • Provides a GUI interface for GNU-Cap OP, DC, AC and Transient analyses and generates appropriate simulator commands based on user input.

  • Provides a GUI interface for Ng-Spice DC, AC and Transient analyses and generates appropriate simulator commands based on user input.

  • The raw output may be viewed for any processes initiated by gspiceui.

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Gtkwave
VCD (Value Change Dump) file waveform viewer
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gtkwave is a viewer for VCD (Value Change Dump) files which are usually created by digital circuit simulators. (These files have no connection to video CDs!)

Gwave
waveform viewer eg for spice simulators
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Gwave is a tool for viewing analog data, such as the output of Spice simulations.

Gwave can read "raw" files from spice2G6, spice3F5 or ngspice, and a tabular ASCII format suitable for use with GnuCAP or homegrown tools. It can also read several binary and ascii files written by commercial spice-type simulators such as hspice, tspice, and nanosim.

It supports multiple "panels" (graticules) with multiple variables displayed in each. Two vertical-bar cursors are available for time-difference measurements. Multiple files can be loaded, for comparing results of several simulations.

Iverilog
Icarus verilog compiler
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Icarus Verilog is intended to compile all of the Verilog HDL as described in the IEEE-1364 standard. It is not quite there yet. It does currently handle a mix of structural and behavioral constructs.

The compiler can target either simulation, or netlist (EDIF).

Kicad
Electronic schematic and PCB design software
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Kicad is a suite of programs for the creation of printed circuit boards. It includes a schematic editor, a PCB layout tool, support tools and a 3D viewer to display a finished & fully populated PCB.

Kicad is made up of 5 main components:

  • kicad - project manager
  • eeschema - schematic editor
  • pcbnew - PCB editor
  • gerbview - GERBER viewer
  • cvpcb - footprint selector for components

Libraries:

  • Both eeschema and pcbnew have library managers and editors for their components and footprints
  • You can easily create, edit, delete and exchange library items
  • Documentation files can be associated with components, footprints and key words, allowing a fast search by function
  • Very large libraries are available for schematic components and footprints
  • Most components have corresponding 3D models
Klogic
digital circuit editor and simulator for KDE
Maintainer: Chris Boyle
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KLogic is an application for building and simulating digital circuits easily.

It provides an easy way to build circuits containing standard components like AND, OR, XOR and flipflops like RS and JK. To build more complex and reusable circuits, you can create sub-circuits.

The simulation runs permanently by default while building your circuits. For extended testing you can use a single stepping simulation to recognise peaks. You can display the signal flow of the components of a circuit as a graph. Each device of your circuit has a tunable delay. With the burst option the delay of all devices can be disabled.

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Linsmith
tool to generate Smith Charts
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A Smith chart is a tool used in electrical engineering that shows how the complex impedance of a transmission line varies along its length, and simplifies the design of impedance matching networks to match the line to its load.

linSmith is a Smith Charting program, mainly designed for educational use. As such, there is an emphasis on capabilities that improve the 'showing the effect of'-style of operation.

Its main features are:

  • Definition of multiple load impedances (at different frequencies)
  • Addition of discrete (L, C, parallel and series LC, and transformer) and line components (open and closed stubs, line segments)
  • Connection in series and parallel
  • Easy experimentation with values using scrollbars
  • A 'virtual' component switches from impedance to admittance to help explaining (or understanding) parallel components
  • The chart works in real impedances (not normalized ones)
  • Direct view of the result on the screen
  • Ability to generate publication quality Postscript output
  • A 'log' file with textual results at each intermediate step
  • Load and circuit configuration is stored separately, permitting several solutions without re-defining the other
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Magic
VLSI layout tool
Maintainer: Roland Stigge
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Magic is a venerable VLSI layout tool, written in the 1980's at Berkeley by John Ousterhout, now famous primarily for writing the scripting interpreter language Tcl. Due largely in part to its liberal Berkeley open-source license, magic has remained popular with universities and small companies. The open-source license has allowed VLSI engineers with a bent toward programming to implement clever ideas and help magic stay abreast of fabrication technology. However, it is the well thought-out core algorithms which lend to magic the greatest part of its popularity. Magic is widely cited as being the easiest tool to use for circuit layout, even for people who ultimately rely on commercial tools for their product design flow.

Oregano
tool for schematical capture of electronic circuits
Maintainer: Maximiliano Curia
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Oregano is a GNOME application for schematic capture and printing of electronic circuits. It can simulate the circuits using Gnucap, ng-spice or Berkeley spice.

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Pcb
printed circuit board (pcb) design program - meta-package
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PCB is an interactive printed circuit board editor for the X11 window system. PCB includes a rats nest feature, design rule checking, and can provide industry standard RS-274-X (Gerber), NC drill, and centroid data (X-Y data) output for use in the board fabrication and assembly process. PCB offers high end features such as an autorouter and trace optimizer which can tremendously reduce layout time.

Python3-pymeasure
??? missing short description for package python3-pymeasure :-(
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Qelectrotech
Electric schematic editor
Maintainer: Denis Briand
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QElectroTech is a Qt5 application written in C++ . This program is helps you to design electric schematics. It includes both a schematic editor and a symbol editor. It uses XML files to store the produced contents.

Qflow
Open-Source Digital Synthesis Flow
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This is a complete tool chain for synthesizing digital circuits starting from verilog source and ending in physical layout for a specific target fabrication process. In the world of commercial electronics, digital synthesis with a target application of a chip design is usually bundled into large EDA software systems. As commercial electronics designers need to maintain cutting-edge performance, these commercial toolchains get more and more expensive, and have largely priced themselves out of all but the established integrated circuit manufacturers. This leaves an unfortunate gap where startup companies and small businesses cannot afford to do any sort of integrated circuit design.

Qflow tries to fill this gap.

Qrouter
Multi-level, over-the-cell maze router
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Qrouter is a tool to generate metal layers and vias to physically connect together a netlist in a VLSI fabrication technology. It is a maze router, otherwise known as an "over-the-cell" router or "sea-of-gates" router. That is, unlike a channel router, it begins with a description of placed standard cells, usually packed together at minimum spacing, and places metal routes over the standard cells.

Qrouter uses the open standard LEF and DEF formats as file input and output. It takes the cell definitions from a LEF file, and analyzes the geometry for each cell to determine contact points and route obstructions. It then reads the cell placement, pin placement, and netlist from a DEF file, performs the detailed route, and writes an annotated DEF file as output.

Qsapecng
symbolic analyzer and solver of linear analog circuits
Maintainer: Simone Rossetto
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This program consists of two independent parts: the SapecNG framework engine and the GUI application QSapecNG.

QSapecNG is an open source, multi-platform project, continuously enhanced by students and researchers of the Department of Electronics and Telecommunications (DET) of the University of Florence (Italy). It comes as continuation of SapWin for Windows, in order to give to the project a full compatibility on other platforms.

Through SapecNG/QSapecNG users can draw, solve and analyze analog circuits as well as manage them. Since version 2.0.0beta1 there is also the full support for sub-circuits that can be created, saved, reopened and added as part of other circuits.

SapecNG/QSapecNG is freely available on GitHub https://github.com/skypjack/qsapecng. A previous version of SapecNG is available on GitHub too https://github.com/skypjack/sapecng.

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Qucs
Quite Universal Circuit Simulator
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Qucs is an integrated circuit simulator which means you are able to setup a circuit with a graphical user interface (GUI) and simulate the large-signal, small-signal and noise behaviour of the circuit. After that simulation has finished you can view the simulation results on a presentation page or window.

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Simulpic
simulator for Microchip PIC16F84 microcontroller
Maintainer: Aurelien Jarno
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This software allows one to simulate the execution of any program on a Microchip PIC16F84 microcontrollerk, and to display register and memory information.

Texlive-latex-extra
??? missing short description for package texlive-latex-extra :-(
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Tkgate
Tcl/Tk based digital circuit editor and simulator
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TkGate is a digital circuit editor and simulator with a Tcl/Tk based interface. TkGate includes a large number of built-in devices including basic gates, memories, ttys and modules for hierarchical design. The simulator can be controlled either interactively or through a simulation script. Memory contents can be loaded from files, and a microcode/macrocode compiler (gmac) is included to create tkgate memory files from a high-level description. The simulator supports continuous simulation, single step simulation (by clock or epoch) and breakpoints. Save files are in a Verilog-like format.

TkGate also includes a number of tutorial and example circuits which can be loaded through the "Help" menu. The examples range from a simple gate-level 3-bit adder to a 16-bit CPU programmed to play the "Animals" game.

TkGate has a multi-language interface with support for English, Japanese, French and Spanish.

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Uisp
Micro In-System Programmer for Atmel's AVR MCUs
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This utility is required to program AVR chips with object code created by the ava assembler/linker, gas, or gcc. It supports in-system programming, Atmel's prototype board/programmer (stk500), and many other extremely low-cost parallel port programmers. It can also be used to program Atmel's AT89S51 and AT89S52.

Verilator
fast free Verilog simulator
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Verilator is the fastest free Verilog HDL simulator, and beats many commercial simulators. It compiles synthesizable Verilog (not test-bench code!), plus some PSL, SystemVerilog and Synthesis assertions into C++ or SystemC code. It is designed for large projects where fast simulation performance is of primary concern, and is especially well suited to generate executable models of CPUs for embedded software design teams.

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Visolate
tool for engraving PCBs using CNCs
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Visolate reads the gerber files describing printed circuit boards and converts them into the G-code (RS-274 code) needed to engrave the layout into a board using a CNC machine. Precise renditions of the original layout can be created as well as voronoi fillings of the original layout, shortening the toolpath.

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Xsmc-calc
Smith Chart calculator for X
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xsmc-calc allows you to perform Smith Chart calculations for RF (radio frequency) circuit design.

Yosys
Framework for Verilog RTL synthesis
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This is a framework for Verilog RTL synthesis. It currently has extensive Verilog-2005 support and provides a basic set of synthesis algorithms for various application domains.

Yosys can be adapted to perform any synthesis job by combining the existing passes (algorithms) using synthesis scripts and adding additional passes as needed by extending the yosys C++ code base.

Official Debian packages with lower relevance

Geda-doc
GPL EDA -- Electronics design software (documentation)
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The gEDA project has produced and continues working on a full GPL'd suite and toolkit of Electronic Design Automation tools. These tools are used for electrical circuit design, schematic capture, simulation, prototyping, and production. Currently, the gEDA project offers a mature suite of free software applications for electronics design, including schematic capture, attribute management, bill of materials (BOM) generation, netlisting into over 20 netlist formats, analog and digital simulation, and printed circuit board (PCB) layout.

This package contains the documentation.

Geda-examples
GPL EDA -- Electronics design software (example designs)
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The gEDA project has produced and continues working on a full GPL'd suite and toolkit of Electronic Design Automation tools. These tools are used for electrical circuit design, schematic capture, simulation, prototyping, and production. Currently, the gEDA project offers a mature suite of free software applications for electronics design, including schematic capture, attribute management, bill of materials (BOM) generation, netlisting into over 20 netlist formats, analog and digital simulation, and printed circuit board (PCB) layout.

This package contains example designs created with gEDA.

Kicad-doc-de
Kicad help files (German)
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This package provides various documentation files for KiCad in German, like the EPUB and the PDF files and also the OnLine HTML documentation for:

  • CvPcb - Component association of Footprints
  • Eeschema -schematic capture editor
  • GerbView - Gerber file viewer (RS 274 X format)
  • GSIK - Getting Started in KiCad
  • IDF Exporter - Export tool for IDFv3 boards and libraries
  • KiCad - The main project editor
  • Pcbnew - The printed circuit board software tool
  • PlEditor - The layout editor for custom title block
Kicad-doc-en
Kicad help files (English)
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This package provides various documentation files for KiCad in English, like the EPUB and the PDF files and also the OnLine HTML documentation for:

  • CvPcb - Component association of Footprints
  • Eeschema -schematic capture editor
  • GerbView - Gerber file viewer (RS 274 X format)
  • GSIK - Getting Started in KiCad
  • IDF Exporter - Export tool for IDFv3 boards and libraries
  • KiCad - The main project editor
  • Pcbnew - The printed circuit board software tool
  • PlEditor - The layout editor for custom title block

You will also find a GUI translation HOWTO inside this package if you want to help with translation of the KiCad GUI into new or existing languages.

Kicad-doc-es
Kicad help files (Spanish)
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This package provides various documentation files for KiCad in Spanish, like the EPUB and the PDF files and also the OnLine HTML documentation for:

  • CvPcb - Component association of Footprints
  • Eeschema -schematic capture editor
  • GerbView - Gerber file viewer (RS 274 X format)
  • GSIK - Getting Started in KiCad
  • KiCad - The main project editor
  • Pcbnew - The printed circuit board software tool
  • PlEditor - The layout editor for custom title block
Kicad-doc-fr
Kicad help files (French)
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This package provides various documentation files for KiCad in French, like the EPUB and the PDF files and also the OnLine HTML documentation for:

  • CvPcb - Component association of Footprints
  • Eeschema -schematic capture editor
  • GSIK - Getting Started in KiCad
  • KiCad - The main project editor
  • Pcbnew - The printed circuit board software tool
  • PlEditor - The layout editor for custom title block
Kicad-doc-it
Kicad help files (Italian)
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This package provides various documentation files for KiCad in Italian, like the EPUB and the PDF files and also the OnLine HTML documentation for:

  • CvPcb - Component association of Footprints
  • Eeschema -schematic capture editor
  • GerbView - Gerber file viewer (RS 274 X format)
  • GSIK - Getting Started in KiCad
  • IDF Exporter - Export tool for IDFv3 boards and libraries
  • KiCad - The main project editor
  • Pcbnew - The printed circuit board software tool
  • PlEditor - The layout editor for custom title block
Kicad-doc-pt
Kicad help files (Portuguese)
Maintainer: Georges Khaznadar ()
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This package provides documentation for Kicad in Portuguese.

Kicad-doc-ru
Kicad help files (Russian)
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This package provides various documentation files for KiCad in Russian, like the EPUB and the PDF files and also the OnLine HTML documentation for:

  • CvPcb - Component association of Footprints
  • GerbView - Gerber file viewer (RS 274 X format)
  • GSIK - Getting Started in KiCad
  • IDF Exporter - Export tool for IDFv3 boards and libraries
  • KiCad - The main project editor
  • PlEditor - The layout editor for custom title block
Libfeel++-dev
A library for the finite element method
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Provides the header files and static libraries.

Feel++ is a versatile finite element library to solve partial differential equations.

Support 1D, 2D, 3D

Support the following basic entities: simplices (segment, triangle, tetrahedron) and product of simplices (quadrangle, hexahedron)

Support various point sets on these basic entities: equispaced points, quadrature points, interpolation points (Gauss-Lobatto, Fekete, WarpBlend?)

Support continuous and discontinuous Galerkin methods

Support various polynomial sets:

  • Lagrange(continuous,discontinuous,all dimensions,all interpolation point sets)

  • Dubiner(discontinuous), boundary adapted(continuous)

  • Legendre(discontinuous), boundary adapted(continuous)

Provide mathematical concept for higher order abstraction (Function spaces and associated elements, forms and operators)

Provide a language embedded in C++ for variational formulations, projection and numerical integration

Debian packages in contrib or non-free

Easyspice
A graphical frontend to the Spice simulator
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Easyspice is a graphical frontend for the electrical circuit simulator Spice. It is by default connected to the geda package and ngspice but can be used as a frontend for other spice simulators programs as well.

Ngspice
Spice circuit simulator
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NGspice is a mixed-level/mixed-signal circuit simulator. Its code is based on three open source software packages: Spice3f5, Cider1b1 and Xspice.

NGspice is part of gEDA project, a full GPL'd suite of Electronic Design Automation tools.

Packaging has started and developers might try the packaging code in VCS

Herb
complete set of CAD programs for design of VLSI circuits
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Version: 0.9.1-1

Herb is a complete set of CAD programs and libraries for the specification, design and validation of VLSI circuits. It includes a VHDL simulator, logic synthesis tools, automatic place and route tools, layout editors, portable CMOS standard cell libraries and custom block generators for creating custom high performance circuits.

Herb supports the following file formats:

  • Behavioural: VHDL, VHDL FSM (input-only)
  • Netlists: Alliance, SPICE, EDIF 2.0, VHDL, COMPASS, HILO (output-only) and Verilog (output-only)
  • Symbolic layout: Alliance, COMPASS
  • Physical layout: CIF (output-only) and GDSII (output-only) .

Unofficial packages built by somebody else

Ksimus
KDE tool for simulating electrical circuits
License: unknown

KSimus is an application for simulating networks with boolean and floating point data type. Some more data types are planned. Currently there exists only a few components, but because of the modular character of KSimus extensions are easy to develop.

Remark of Debian Science team: Removed from Debian

This package was removed from Debian but some versions are available from http://snapshot.debian.org/

Reasons are given here: http://bugs.debian.org/589400

Vbpp
Verilog preprocessor
License: unknown

VBPP is a Verilog preprocessor. It has support for most Verilog preprocessing directives and additional directives such as:

  • Statement generator ('generate' command in VHDL).
  • Expression evaluation.
  • Mathematical functions: log2, ceil, floor, round, abs, etc.
  • Conditionals: if, switch, etc.
Remark of Debian Science team: Removed from Debian

This package was removed from Debian but some versions are available from http://snapshot.debian.org/

Reasons are given here: http://bugs.debian.org/324765

Vbs
Verilog Behavioral Simulation
License: unknown

Verilog is a Hardware Description Language used mostly for digital circuit design and simulation. This program is a simple implementation of a Verilog simulator. VBS tries to implement all of the Verilog behavioral constructs that are synthesizable, but still allow complex test vectors for simulation.

Remark of Debian Science team: Removed from Debian

This package was removed from Debian but some versions are available from http://snapshot.debian.org/

Reasons are given here: http://bugs.debian.org/303625

*Popularitycontest results: number of people who use this package regularly (number of people who upgraded this package recently) out of 195306